clash-ghc

CAES Language for Synchronous Hardware

http://www.clash-lang.org/

Version on this page:0.5.5@rev:2
LTS Haskell 19.33:1.6.4
Stackage Nightly 2024-04-25:1.8.1@rev:1
Latest on Hackage:1.8.1@rev:1

See all snapshots clash-ghc appears in

BSD-2-Clause licensed by Christiaan Baaij
Maintained by Christiaan Baaij
This version can be pinned in stack with:clash-ghc-0.5.5@sha256:c41fc867eddae3a8cf5c714487b7a875603ace58b39b0f35f492cf1b1cf2c86d,3987

Module documentation for 0.5.5

There are no documented modules for this package.

Support

For updates and questions join the mailing list [email protected] or read the forum

clash-ghc

  • See the LICENSE file for license and copyright details
  • Contains code from the GHC compiler, see the LICENSE_GHC file for license and copyright details pertaining to that code.

Changes

Changelog for the clash-ghc package

0.5.5 May 5th 2015

  • New features:
    • TopEntity wrappers are now specified as ANN annotation pragmas #42

0.5.4 May 1st 2015

  • New features:
    • Generate wrappers around topEntity that have constant names and types

0.5.3 April 24th 2015

  • Fixes bugs:
    • Fix bug where not enough array type definitions were created by the VHDL backend

0.5.2 April 21st 2015

  • Use latest ghc-typelits-natnormalise

0.5.1 April 20th 2015

0.5 March 11th 2015

  • New features:
    • SystemVerilog backend. #45

0.4.1 February 4th 2015

  • Include bug fixes from clash-lib 0.4.1

0.4 November 17th 2014

  • New features:

    • Support for clash-prelude 0.6
  • Fixes bugs:

    • clash-ghc ignores “-package-db” flag #35

0.3.3 August 12th 2014

  • Fixes bugs:
    • Compile with GHC 7.8.3 #31

0.3.2 June 5th 2014

  • Fixes bugs:
    • Type synonym improperly expanded #17
    • BlackBox for Signed maxBound and minBound generate incorrect VHDL. #19
    • Generate failure code in the VHDL for recSelError #23

0.3.1 May 15th 2014

  • New features:

    • Hardcode fromInteger for Signed and Unsigned #9
    • Better blackbox operation for vindex #12
    • Replace VHDL default hole by error hole #13
  • Fixes bugs:

    • Update GHC2Core.hs #1
    • primitives (clash.sized.vector) #2
    • Type families are not expanded #3
    • Incorrect vhdl generation for default value in blackbox #6
    • Missing begin keyword in Signed/Unsigned JSON files #16