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1. sumFlipLazy :: Num a => [a] -> a

   perf	Perf.Algos

   Lazy with argument order flipped.

2. sFlipOrdering :: forall (ord :: Ordering) . SOrdering ord -> SOrdering (FlipOrdering ord)

   type-natural	Data.Type.Natural

   No documentation available.

3. congFlipOrdering :: forall (a :: Ordering) (b :: Ordering) . (a :~: b) -> FlipOrdering a :~: FlipOrdering b

   type-natural	Data.Type.Natural.Lemma.Order

   No documentation available.

4. sFlipOrdering :: forall (ord :: Ordering) . SOrdering ord -> SOrdering (FlipOrdering ord)

   type-natural	Data.Type.Natural.Lemma.Order

   No documentation available.

5. dualFlipFlopSynchronizer :: forall a (dom1 :: Domain) (dom2 :: Domain) . (NFDataX a, KnownDomain dom1, KnownDomain dom2) => Clock dom1 -> Clock dom2 -> Reset dom2 -> Enable dom2 -> a -> Signal dom1 a -> Signal dom2 a

   clash-prelude	Clash.Explicit.Prelude

   Synchronizer based on two sequentially connected flip-flops.

   • NB: This synchronizer can be used for bit-synchronization.
   • NB: Although this synchronizer does reduce metastability, it does not guarantee the proper synchronization of a whole word. For example, given that the output is sampled twice as fast as the input is running, and we have two samples in the input stream that look like:

     [0111,1000]

     But the circuit driving the input stream has a longer propagation delay on msb compared to the lsbs. What can happen is an output stream that looks like this:

     [0111,0111,0000,1000]

     Where the level-change of the msb was not captured, but the level change of the lsbs were.If you want to have safe word-synchronization use asyncFIFOSynchronizer.

6. dualFlipFlopSynchronizer :: forall a (dom1 :: Domain) (dom2 :: Domain) . (NFDataX a, KnownDomain dom1, KnownDomain dom2) => Clock dom1 -> Clock dom2 -> Reset dom2 -> Enable dom2 -> a -> Signal dom1 a -> Signal dom2 a

   clash-prelude	Clash.Explicit.Prelude.Safe

   Synchronizer based on two sequentially connected flip-flops.

   • NB: This synchronizer can be used for bit-synchronization.
   • NB: Although this synchronizer does reduce metastability, it does not guarantee the proper synchronization of a whole word. For example, given that the output is sampled twice as fast as the input is running, and we have two samples in the input stream that look like:

     [0111,1000]

     But the circuit driving the input stream has a longer propagation delay on msb compared to the lsbs. What can happen is an output stream that looks like this:

     [0111,0111,0000,1000]

     Where the level-change of the msb was not captured, but the level change of the lsbs were.If you want to have safe word-synchronization use asyncFIFOSynchronizer.

7. dflipflop :: forall (dom :: Domain) a . (KnownDomain dom, NFDataX a) => Clock dom -> Signal dom a -> Signal dom a

   clash-prelude	Clash.Explicit.Signal

   Special version of delay that doesn't take enable signals of any kind. Initial value will be undefined.

8. dualFlipFlopSynchronizer :: forall a (dom1 :: Domain) (dom2 :: Domain) . (NFDataX a, KnownDomain dom1, KnownDomain dom2) => Clock dom1 -> Clock dom2 -> Reset dom2 -> Enable dom2 -> a -> Signal dom1 a -> Signal dom2 a

   clash-prelude	Clash.Explicit.Synchronizer

   Synchronizer based on two sequentially connected flip-flops.

   • NB: This synchronizer can be used for bit-synchronization.
   • NB: Although this synchronizer does reduce metastability, it does not guarantee the proper synchronization of a whole word. For example, given that the output is sampled twice as fast as the input is running, and we have two samples in the input stream that look like:

     [0111,1000]

     But the circuit driving the input stream has a longer propagation delay on msb compared to the lsbs. What can happen is an output stream that looks like this:

     [0111,0111,0000,1000]

     Where the level-change of the msb was not captured, but the level change of the lsbs were.If you want to have safe word-synchronization use asyncFIFOSynchronizer.

9. dflipflop :: forall (dom :: Domain) a . (HiddenClock dom, NFDataX a) => Signal dom a -> Signal dom a

   clash-prelude	Clash.Prelude

   Special version of delay that doesn't take enable signals of any kind. Initial value will be undefined.

10. dflipflop :: forall (dom :: Domain) a . (HiddenClock dom, NFDataX a) => Signal dom a -> Signal dom a

    clash-prelude	Clash.Signal

    Special version of delay that doesn't take enable signals of any kind. Initial value will be undefined.

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