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1. outputVerifierBitVector :: forall (l :: Nat) (n :: Nat) (testDom :: Domain) (circuitDom :: Domain) . (KnownNat l, KnownNat n, KnownDomain testDom, KnownDomain circuitDom, 1 <= l) => Clock testDom -> Clock circuitDom -> Reset testDom -> Vec l (BitVector n) -> Signal circuitDom (BitVector n) -> Signal testDom Bool

   clash-prelude	Clash.Explicit.Testbench

   Same as outputVerifier, but can handle don't care bits in its expected values.

2. outputVerifierBitVector' :: forall (l :: Nat) (n :: Nat) (dom :: Domain) . (KnownNat l, KnownNat n, KnownDomain dom, 1 <= l) => Clock dom -> Reset dom -> Vec l (BitVector n) -> Signal dom (BitVector n) -> Signal dom Bool

   clash-prelude	Clash.Explicit.Testbench

   Same as outputVerifier', but can handle don't care bits in its expected values.

3. concatBitVector# :: forall (n :: Nat) (m :: Nat) . (KnownNat n, KnownNat m) => Vec n (BitVector m) -> BitVector (n * m)

   clash-prelude	Clash.Prelude

   No documentation available.

4. unconcatBitVector# :: forall (n :: Nat) (m :: Nat) . (KnownNat n, KnownNat m) => BitVector (n * m) -> Vec n (BitVector m)

   clash-prelude	Clash.Prelude

   No documentation available.

5. concatBitVector# :: forall (n :: Nat) (m :: Nat) . (KnownNat n, KnownNat m) => Vec n (BitVector m) -> BitVector (n * m)

   clash-prelude	Clash.Prelude.Safe

   No documentation available.

6. unconcatBitVector# :: forall (n :: Nat) (m :: Nat) . (KnownNat n, KnownNat m) => BitVector (n * m) -> Vec n (BitVector m)

   clash-prelude	Clash.Prelude.Safe

   No documentation available.

7. assertBitVector :: forall (n :: Nat) (dom :: Domain) b . (KnownNat n, HiddenClock dom, HiddenReset dom) => String -> Signal dom (BitVector n) -> Signal dom (BitVector n) -> Signal dom b -> Signal dom b

   clash-prelude	Clash.Prelude.Testbench

   The same as assert, but can handle don't care bits in its expected value.

8. outputVerifierBitVector' :: forall (l :: Nat) (n :: Nat) (dom :: Domain) . (KnownNat l, KnownNat n, HiddenClock dom, HiddenReset dom, 1 <= l) => Vec l (BitVector n) -> Signal dom (BitVector n) -> Signal dom Bool

   clash-prelude	Clash.Prelude.Testbench

   Same as outputVerifier', but can handle don't care bits in its expected values.

9. module Clash.Sized.BitVector

   No documentation available.

10. data BitVector (n :: Nat)

    clash-prelude	Clash.Sized.BitVector

    A vector of bits

    • Bit indices are descending
    • Num instance performs unsigned arithmetic.
    NB: The usual Haskell method of converting an integral numeric type to another, fromIntegral, is not well suited for Clash as it will go through Integer which is arbitrarily bounded in HDL. Instead use bitCoerce and the Resize class. BitVector has the type role

    >>> :i BitVector
    type role BitVector nominal
    ...
    

    as it is not safe to coerce between different sizes of BitVector. To change the size, use the functions in the Resize class.

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