Hoogle Search

Within LTS Haskell 24.51 (ghc-9.10.3)

Note that Stackage only displays results for the latest LTS and Nightly snapshot. Learn more.

Exact lookup

1. rEP_StgEntCounter_allocd :: Platform -> CmmType

   ghc	GHC.Cmm.Type

   No documentation available.

2. rEP_StgEntCounter_allocs :: Platform -> CmmType

   ghc	GHC.Cmm.Type

   No documentation available.

3. toBlockListEntryFirstFalseFallthrough :: CmmGraph -> [CmmBlock]

   ghc	GHC.Cmm.Utils

   Like toBlockListEntryFirst, but we strive to ensure that we order blocks so that the false case of a conditional jumps to the next block in the output list of blocks. This matches the way OldCmm blocks were output since in OldCmm the false case was a fallthrough, whereas in Cmm conditional branches have both true and false successors. Block ordering can make a big difference in performance in the LLVM backend. Note that we rely crucially on the order of successors returned for CmmCondBranch by the NonLocal instance for CmmNode defined in GHC.Cmm.Node. -GBM

4. ncgAllocMoreStack :: NcgImpl statics instr jumpDest -> Int -> NatCmmDecl statics instr -> UniqSM (NatCmmDecl statics instr, [(BlockId, BlockId)])

   ghc	GHC.CmmToAsm

   The list of block ids records the redirected jumps to allow us to update the CFG.

5. callerSavedRegisters :: [Reg]

   ghc	GHC.CmmToAsm.AArch64.Instr

   0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 | 24 | 25 | 26 | 27 | 28 | 29 | 30 | 31 | | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 42 | 44 | 45 | 46 | 47 | 48 | 49 | 50 | 51 | 52 | 53 | 54 | 55 | 56 | 57 | 58 | 59 | 60 | 61 | 62 | 63 | |== General Purpose registers ==================================================================================================================================| | argument passing ------------- | IR | tmp registers -------- | IP0| IP1| PL | callee saved ------------ | FP | LR | SP | | free registers -------------------------------------------------------------------- | BR | Sp | Hp | R1 | R2 | R3 | R4 | R5 | R6 | SL | -- | -- | -- | |== SIMD/FP Registers ==========================================================================================================================================| | argument passing ------------- | callee saved (lower 64 bits) --- | caller saved ---------------------- | | free registers ------------- | F1 | F2 | F3 | F4 | D1 | D2 | D3 | D4 | free registers ----------------------------------------------------- | '---------------------------------------------------------------------------------------------------------------------------------------------------------------' IR: Indirect result location register, IP: Intra-procedure register, PL: Platform register, FP: Frame pointer, LR: Link register, SP: Stack pointer BR: Base, SL: SpLim TODO: The zero register is currently mapped to -1 but should get it's own separate number.

6. canFallthroughTo :: Instr -> BlockId -> Bool

   ghc	GHC.CmmToAsm.AArch64.Instr

   No documentation available.

7. mkStackAllocInstr :: Platform -> Int -> [Instr]

   ghc	GHC.CmmToAsm.AArch64.Instr

   No documentation available.

8. mkStackDeallocInstr :: Platform -> Int -> [Instr]

   ghc	GHC.CmmToAsm.AArch64.Instr

   No documentation available.

9. callWeight :: Weights -> Int

   ghc	GHC.CmmToAsm.CFG.Weight

   No documentation available.

10. ncgDumpRegAllocStages :: NCGConfig -> !Bool

    ghc	GHC.CmmToAsm.Config

    No documentation available.

Page 256 of many | Previous | Next