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Within LTS Haskell 24.6 (ghc-9.10.2)

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  1. map :: forall (m :: Type -> Type) a b . Monad m => (a -> b) -> Stream m a -> Stream m b

    streamly-core Streamly.Internal.Data.Stream

    No documentation available.

  2. map :: forall a b (m :: Type -> Type) . (a -> b) -> StreamK m a -> StreamK m b

    streamly-core Streamly.Internal.Data.StreamK

    No documentation available.

  3. map :: forall (m :: Type -> Type) b c a . Functor m => (b -> c) -> Unfold m a b -> Unfold m a c

    streamly-core Streamly.Internal.Data.Unfold

    Map a function on the output of the unfold (the type b). 

    >>> map f = Unfold.map2 (const f)
    Pre-release

  4. map :: forall (m :: Type -> Type) a b . Monad m => (a -> b) -> Stream m a -> Stream m b

    vector-stream Data.Stream.Monadic

    Map a function over a Stream

  5. map :: Nat -> (Nat -> LocalId -> Exp) -> Exp -> Exp

    Agda Agda.Compiler.JS.Substitution

    No documentation available.

  6. map :: Ord b => (a -> b) -> Bag a -> Bag b

    Agda Agda.Utils.Bag

    O(n).

  7. map :: (a -> b) -> NonEmpty a -> NonEmpty b

    Agda Agda.Utils.List1

    Map a function over a NonEmpty stream.

  8. map :: (AsEnumSet a, AsEnumSet b) => (a -> b) -> EnumSet a -> EnumSet b

    bitwise-enum Data.Enum.Set

    O(n). map f s is the set obtained by applying f to each element of s. It's worth noting that the size of the result may be smaller if, for some (x,y), x /= y && f x == f y

  9. map :: (FiniteBits w, Num w, Enum a, Enum b) => (a -> b) -> EnumSet w a -> EnumSet w b

    bitwise-enum Data.Enum.Set.Base

    O(n). map f s is the set obtained by applying f to each element of s. It's worth noting that the size of the result may be smaller if, for some (x,y), x /= y && f x == f y.

  10. map :: forall a b (n :: Nat) . (a -> b) -> Vec n a -> Vec n b

    clash-prelude Clash.Explicit.Prelude

    "map f xs" is the vector obtained by applying f to each element of xs, i.e., 

    map f (x1 :> x2 :>  ... :> xn :> Nil) == (f x1 :> f x2 :> ... :> f xn :> Nil)
    and corresponds to the following circuit layout:

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