clash-prelude
CAES Language for Synchronous Hardware - Prelude library
Version on this page: | 0.99.3 |
LTS Haskell 22.43: | 1.8.1@rev:3 |
Stackage Nightly 2024-12-05: | 1.8.1@rev:3 |
Latest on Hackage: | 1.8.1@rev:3 |
clash-prelude-0.99.3@sha256:3dd6d8abfc1fa3b694bea3cf0ba6889b2bdb459ed0af535c0214d440ac8ebf00,9146
Module documentation for 0.99.3
- Clash
- Clash.Annotations
- Clash.Class
- Clash.Examples
- Clash.Explicit
- Clash.Hidden
- Clash.Intel
- Clash.NamedTypes
- Clash.Prelude
- Clash.Promoted
- Clash.Signal
- Clash.Sized
- Clash.Tutorial
- Clash.XException
- Clash.Xilinx
CλaSH - A functional hardware description language
WARNING Only works with GHC-8.2 or higher (http://www.haskell.org/ghc/download_ghc_8_4_3)!
CλaSH (pronounced ‘clash’) is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The CλaSH compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.
Features of CλaSH:
-
Strongly typed, yet with a very high degree of type inference, enabling both safe and fast prototyping using concise descriptions.
-
Interactive REPL: load your designs in an interpreter and easily test all your component without needing to setup a test bench.
-
Higher-order functions, with type inference, result in designs that are fully parametric by default.
-
Synchronous sequential circuit design based on streams of values, called
Signal
s, lead to natural descriptions of feedback loops. -
Support for multiple clock domains, with type safe clock domain crossing.
Support
For updates and questions join the mailing list [email protected] or read the forum
Changes
Changelog for clash-prelude
package
0.99.3 July 26th 2018
- Bundle and BitPack instances up to and including 62-tuples
- Handle undefined writes to RAM properly
- Handle undefined clock enables properly
0.99.1 May 12th 2018
- Support for
ghc-typelits-natnormalise-0.6.1
Lift
instances forTopEntity
andPortName
InlinePrimitive
support: specify HDL primitives inline with Haskell code
0.99 March 31st 2018
- Major API overhaul: check the migration guide at the end of
Clash.Tutorial
- New features:
- Explicit clock and reset arguments
- Rename
CLaSH
toClash
- Implicit/
Hidden
clock and reset arguments using a combination ofreflection
andImplicitParams
. - Large overhaul of
TopEntity
annotations - PLL and other clock sources can now be instantiated using regular functions:
Clash.Intel.ClockGen
andClash.Xilinx.ClockGen
. - DDR registers:
- Generic/ASIC:
Clash.Explicit.DDR
- Intel:
Clash.Intel.DDR
- Xilinx:
Clash.Intel.Xilinx
- Generic/ASIC:
Bit
is now anewtype
instead of atype
synonym and will be mapped to a HDL scalar instead of an array of one (e.gstd_logic
instead ofstd_logic_vector(0 downto 0)
)
0.11.2
- New features:
- Add
riseEvery
: Give a pulse every @n@ clock cycles. (Thanks to @thoughtpolice) - Add
oscillate
: Oscillate a @‘Bool’@ with a given half-period of cycles. (Thanks to @thoughtpolice)
- Add
- Fixes bugs:
- Eagerness bug in
regEn
#104 (Thanks to @cbiffle)
- Eagerness bug in
0.11.1
- Changes:
- Bundle instance for
()
behaves like a product-type instance #96
- Bundle instance for
- Fixes bugs:
- Ensure that
fold
gets correctly type-applied inVec.==
#202
- Ensure that
0.11
- New features:
CLaSH.XException
: a module defining an exception representing uninitialised values. Additionally adds theShowX
class which has methods that prints values as “X” where they would normally raise anXException
exception.- Add
BNat
(and supporting functions) toCLaSH.Promoted.Nat
: base-2 encoded natural numbers. - Add
divSNat
andlogBaseSNat
toCLaSH.Promoted.Nat
: division and logarithm for singleton natural numbers. - Add
predUNat
andsubUNat
toCLaSH.Promoted.Nat
: predecessor and subtraction for unary-encoded natural numbers. - Add
dtfold
toCLaSH.Sized.Vector
: a dependently-typed tree-fold overVec
. - Add the perfect-depth binary trees module
CLaSH.Sized.RTree
- Synthesisable definitions of
countLeadingZeros
andcountTrailingZeros
for:BitVector
,Signed
,Unsigned
, andFixed
- Add the
(:::)
type alias inCLaSH.NamedTypes
which allows you to annotate types with documentation
- Changes:
asyncRam
,blockRam
,blockRamFile
have aMaybe (addr,a)
as write input instead of three separateBool
,addr
, anda
inputs.asyncFIFOSynchronizer
has aMaybe a
as write-request instead of a separateBool
anda
inputbundle'
andunbundle'
are removed;bundle
now has typeUnbundled' clk a -> Signal' clk a
,unbundle
now has typeSignal' clk a -> Unbundled' clk a
subSNat
now has the typeSNat (a+b) -> SNat b -> SNat a
(where it used to beSNat a -> SNat b -> SNat (a-b)
)- Renamed
multUNat
tomulUNat
to be in sync withmulSNat
andmulBNat
. - The function argument of
vfold
inCLaSH.Sized.Vector
is now(forall l . SNat l -> a -> Vec l b -> Vec (l + 1) b)
(where it used to be(forall l . a -> Vec l b -> Vec (l + 1) b)
) Cons
constructor ofVec
is no longer visible;(:>)
and(:<)
are now listed as constructors ofVec
- Simulation speed improvements for numeric types
0.10.12
- Fixes bugs:
Vec
sunbundle
is too strict, i.e.register (undefined :: Vec 2 Int)
/=bundle . unbundle . register (undefined :: Vec 2 Int)
0.10.11 August 3rd 2016
- New features:
- Add strict version of:
sample
,sampleN
,fromList
, andsimulate
- Make
Signal
s<*>
slightly stricter:- Feedback loops still work with this new implementation
- No more space-leaks when used in combination with the strict version of
sample
,sampleN
, andsimulate
- Add
NFData
instances for the numeric types
- Add strict version of:
- Speed up arithmetic operations of
Signed
,Unsigned
andBitVector
- Fixes bugs:
- CLaSH compiler sees internals of numeric types in their
Lift
functions
- CLaSH compiler sees internals of numeric types in their
0.10.10 July 15th 2016
- Fixes bugs:
shrink
functions for numeric types throw exceptions #153- CLaSH compiler sees internals of numeric types in their Show functions
0.10.9 June 9th 2016
- Fixes bugs:
Eq
instance ofVec
sometimes not synthesisable
0.10.8 June 7th 2016
- New features:
- Instances of
Data
for numeric types. - Instances of
Read
for {Index, Signed, Unsigned, Fixed} - Instances of
BitPack
for 3-8 tuples
- Instances of
0.10.7 April 7th 2016
- Support doctest-0.11.0
0.10.6 February 10th 2016
- Fixes bugs:
CLaSH.Prelude.DataFlow.parNDF
is not lazy enough
0.10.5 January 13th 2016
- New features:
- Add
readNew
toCLaSH.Prelude.BlockRam
: create a read-after-write blockRAM from a read-before-write blockRAM. popCount
functions forBitVector
,Signed
, andUnsigned
are now synthesisable.- Add
parNDF
toCLaSH.Prelude.DataFlow
: compose N dataflow circuits in parallel. - Add and instance
Vec n a
forLockStep
inCLaSH.Prelude.DataFlow
: have N dataflow circuits operate in lock-step.
- Add
0.10.4 December 11th 2015
- New features:
- Add
pureDF
toCLaSH.Prelude.DataFlow
: lift combinational circuits toDataFlow
circuits. - Add
fifoDF
toCLaSH.Prelude.DataFlow
: a simple FIFO buffer adhering to theDataFlow
protocol. loopDF
no longer uses thelockStep
andstepLock
automatically, and now includes a FIFO buffer on the feedback path.- Add
loopDF_nobuf
toCLaSH.Prelude.DataFlow
: a version ofloopDF
with no FIFO buffer on the feedback path. - Add
boolToBV
toCLaSH.CLass.BitPack
: convertBool
eans ton
-bitBitVector
s. ClockSource
inCLaSH.Annotations.TopEntity
can now have multiple clock inputs #33
- Add
- Bug fixes:
asyncRomFile
reads file multiple times.
0.10.3 October 24th 2015
- Disable CPR analysis (See https://github.com/clash-lang/clash-compiler/commit/721fcfa9198925661cd836668705f817bddaae3c):
- GHC < 7.11: In all modules using
-fcpr-off
- GHC >= 7.11: In
CLaSH.Signal.Internal
andCLaSH.Prelude.RAM
using-fno-cpr-anal
- GHC < 7.11: In all modules using
0.10.2 October 21st 2015
- New features:
ExtendingNum
,BitPack
, andResize
instance forIndex
- Add
bv2i
: convertBitVector n
toIndex (2^n)
- Export type-level operations from ghc-typelits-extra
0.10.1 October 16th 2015
- New features:
- The
f
indfold p f
, now has anSNat l
instead of aProxy l
as its first argument. - Add
bv2v
andv2bv
functions that convert betweenVec n Bit
andBitVector n
. - Add
smap
: apply a function to every element of a vector and the element’s position (as an ‘SNat’ value) in the vector.
- The
0.10 October 3rd 2015
- New features:
- The Vec constructor
:>
is now an explicitly bidirectional pattern synonym (the actual constructor has been renamed to Cons). As a result, pattern matching on:>
is now synthesisable by the CLaSH compiler. - The function
<:
is replaced by the the explicitly bidirectional pattern synonym:<
. This allows you to pattern match on: “all but the last element of a vector” and “the last element” of the vector. Because it is a bidirectional pattern,:<
can also be used as an expression that appends an element to the tail of a vector. - Add a
transpose
function inCLaSH.Sized.Vector
. - Add
stencil1d
andstensil2d
stencil computation functions inCLaSH.Sized.Vector
. - Add
permute
,backpermute
,scatter
, andgather
permutation functions inCLaSH.Sized.Vector
. - Add specialised permutation functions
interleave
,rotateLeft
, androtateRight
inCLaSH.Sized.Vector
. sscanl
andsscanr
inCLaSH.Sized.Vector
are renamed topostscanl
and postscanrto be more in line with existing Haskell packages such as
vectorand
accelerate`.- The
Foldable
andTraversable
instances ofVec
now only works for non-empty vectors. - Where possible, members of the
Foldable
instance ofVec
are described in terms offold
, which builds a tree (of depthlog(n)
) of computations, instead offoldr
which had depthn
computations. This reduces the critical path length in your circuits when using these functions. maxIndex
andlength
inCLaSH.Sized.Vector
return anInt
instead of anInteger
.- Add functions that involve an index into a vector to the
CLaSH.Sized.Vector
module:indices
,indicesI
,imap
,izipWith
,ifoldr
,ifoldl
,findIndex
,elemIndex
. CLaSH.Sized.Vector
’sfold
,dfold
,vfold
, andtoList
are now synthesisable by the CLaSH compiler.
- The Vec constructor
0.9.3 September 21st 2015
- Fixes bugs:
- Cannot build against singletons-0.2
- Numerous documentation fixes
0.9.2 August 2nd 2015
- Disable strictness analysis in
CLaSH.Signal.Internal
, this allows turning on strictness analysis in the GHC front-end of the CLaSH compiler.
0.9.1 June 26th 2015
- Updated documentation on data-file support on Altera/Quartus
0.9 June 25th 2015
- New features:
- Add operations on singleton natural numbers:
addSNat
,subSNat
,mulSNat
, andpowSNat
. - Add asynchronous RAM functions in
CLaSH.Prelude.RAM
, which have an asynchronous/combinational read port. - Add ROM functions in modules
CLaSH.Prelude.ROM
andCLaSH.Prelude.ROM.File
, where the latter module contains functions that instantiate a ROM from the content specified in an external data-file. - Add BlockRam functions, in the
CLaSH.Prelude.BlockRam.File
module, whose content can be initialised with the content specified in an external data-file. assert
now takes an extraString
argument so you can distinguish oneassert
from the others. Additionally,assert'
is added which takes an additionalSClock
argument. This is needed, becauseassert
now reports the clock cycle, and clock domain, when an assertion fails.defClkAltera
anddefClkXilinx
are replaced by,altpll
andalteraPll
for Altera clock sources, andclockWizard
for Xilinx clock sources. These names correspond to the names of the generator utilities in Quartus and ISE/Vivado.- Add Safe versions of the prelude modules:
CLaSH.Prelude.Safe
andCLaSH.Prelude.Explicit.Safe
- Add synchronizers in the
CLaSH.Prelude.Synchronizer
module
- Add operations on singleton natural numbers:
0.8 June 3rd 2015
- New features:
-
Make the (Bit)Vector argument the last argument for the following functions:
slice
,setSlice
,replaceBit
,replace
. The signatures for the above functions are now:slice :: BitPack a => SNat m -> SNat n -> a -> BitVector (m + 1 - n) setSlice :: BitPack a => SNat m -> SNat n -> BitVector (m + 1 - n) -> a -> a replaceBit :: Integral i => i -> Bit -> a -> a replace :: Integral i => i -> a -> Vec n a -> Vec n a
This allows for easier chaining, e.g.:
replaceBit 0 1 $ repleceBit 4 0 $ replaceBit 6 1 bv
-
Until version 0.7.5, given
x :: Vec 8 Bit
andy :: BitVector 8
, it used to belast x == msb y
. This is quite confusing when printing converted values. Until version 0.7.5 we would get:> 0x0F :: BitVector 8 0000_1111 > unpack 0x0F :: Vec 8 Bit <1,1,1,1,0,0,0,0>
As of version 0.8, we have
head x == msb y
:> 0x0F :: BitVector 8 0000_1111 > unpack 0x0F :: Vec 8 Bit <0,0,0,0,1,1,1,1>
So converting for
Vec
tors ofBit
s toBitVector
s is no longer index-preserving, but it is order-preserving. -
Add QuickCheck
Arbitary
andCoArbitary
instances for all data types -
Add lens
Ixed
instances forBitVector
,Signed
,Unsigned
, andVec
-
0.7.5 May 7th 2015
- New features:
- Moore machine combinators
0.7.4 *May 5th 2015
- New features:
- Add
TopEntity
annotations
- Add
0.7.3 April 22nd 2015
- New features:
- Add the vector functions:
zip3
,unzip3
, andzipWith3
- Use version 0.2 of the
ghc-typelits-natnormalise
package
- Add the vector functions:
0.7.2 April 20th 2015
- New features:
- Support for GHC 7.10 => only works with GHC 7.10 and higher
- Use http://hackage.haskell.org/package/ghc-typelits-natnormalise typechecker plugin for better type-level natural number handling
0.7.1 March 25th 2015
- Fixes bugs:
- Fix laziness bug in Vector.(!!) and Vector.replace
0.7 March 13th 2015
-
New features:
- Switch types of
bundle
andbundle'
, andunbundle
andunbundle'
. - Rename all explicitly clocked versions of Signal functions, to the primed
name of the implicitly clocked Signal functions. E.g.
cregister
is now calledregister'
(where the implicitly clocked function is callledregister
) - Add new instances for
DSignal
- Add experimental
antiDelay
function forDSignal
- Generalize lifted functions over Signals (e.g. (.==.))
- Switch types of
-
Fixes bugs:
- Faster versions of Vector.(!!) and Vector.replace
0.6.0.1 November 17th 2014
- Fixes bugs:
- Add missing ‘CLaSH.Sized.BitVector’ module to .cabal file.
0.6 November 17th 2014
-
New features:
- Add
Fractional
instance forFixed
#9 - Make indexing/subscript of
Vec
ascending #4 - Add separate
BitVector
type, which has a descending index. - Add bit indexing operators, including the index/subscript operator
(!)
. - Add bit reduction operators:
reduceOr
,reduceAnd
,reduceOr
. - Rename
BitVector
class toBitPack
withpack
andunpack
class methods. - Rename
Pack
class toBundle
withbundle
andunbundle
class methods. - Strip all
Vec
functions from theirv
prefix, i.e.vmap
->map
. - Rename
Vec
indexing operator from(!)
to(!!)
. - Combine
Add
andMult
class intoExtendingNum
class. - Add extend and truncate methods to the
Resize
class. - Add
SaturatingNum
class with saturating numeric operators. - Add multitude of lifted
Signal
operators, i.e.(.==.) :: Eq a => Signal a -> Signal a -> Signal Bool
- Add
CLaSH.Signal.Delayed
with functions and data types for delay-annotated signals to support safe synchronisation. - Add
CLASH.Prelude.DataFlow
with functions and data types to create self-synchronising circuits based on data-flow principles.
- Add
-
Fixes bugs:
- Remove deprecated ‘Arrow’ instance for and related functions for
Comp
#5
- Remove deprecated ‘Arrow’ instance for and related functions for
0.5.1 June 5th 2014
-
New features:
-
Fixes bugs:
0.5 April 3rd 2014
- Add explicitly clocked synchronous signals for multi-clock circuits
0.4.1 March 27th 2014
- Add saturation to fixed-point operators
- Finalize most documentation
0.4 March 20th 2014
- Add fixed-point integers
- Extend documentation
- ‘bit’ and ‘testBit’ functions give run-time errors on out-of-bound positions
0.3 March 14th 2014
- Add Documentation
- Easy SNat literals for 0..1024, e.g. d4 = snat :: SNat 4
- Fix blockRamPow2
0.2 March 5th 2014
- Initial release