CAES Language for Synchronous Hardware - Prelude library

Version on this page:0.9.3
LTS Haskell 22.26:1.8.1@rev:2
Stackage Nightly 2024-06-21:1.8.1@rev:2
Latest on Hackage:1.8.1@rev:2

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= WARNING = Only works with GHC-7.10.* (!


Changelog for clash-prelude package

0.9.3 September 21st 2015

  • Fixes bugs:
    • Cannot build against singletons-0.2
    • Numerous documentation fixes

0.9.2 August 2nd 2015

  • Disable strictness analysis in CLaSH.Signal.Internal, this allows turning on strictness analysis in the GHC front-end of the CLaSH compiler.

0.9.1 June 26th 2015

  • Updated documentation on data-file support on Altera/Quartus

0.9 June 25th 2015

  • New features:
    • Add operations on singleton natural numbers: addSNat, subSNat, mulSNat, and powSNat.
    • Add asynchronous RAM functions in CLaSH.Prelude.RAM, which have an asynchronous/combinational read port.
    • Add ROM functions in modules CLaSH.Prelude.ROM and CLaSH.Prelude.ROM.File, where the latter module contains functions that instantiate a ROM from the content specified in an external data-file.
    • Add BlockRam functions, in the CLaSH.Prelude.BlockRam.File module, whose content can be initialised with the content specified in an external data-file.
    • assert now takes an extra String argument so you can distinguish one assert from the others. Additionally, assert' is added which takes an additional SClock argument. This is needed, because assert now reports the clock cycle, and clock domain, when an assertion fails.
    • defClkAltera and defClkXilinx are replaced by, altpll and alteraPll for Altera clock sources, and clockWizard for Xilinx clock sources. These names correspond to the names of the generator utilities in Quartus and ISE/Vivado.
    • Add Safe versions of the prelude modules: CLaSH.Prelude.Safe and CLaSH.Prelude.Explicit.Safe
    • Add synchronizers in the CLaSH.Prelude.Synchronizer module

0.8 June 3rd 2015

  • New features:
    • Make the (Bit)Vector argument the last argument for the following functions: slice, setSlice, replaceBit, replace. The signatures for the above functions are now:

      slice      :: BitPack a => SNat m -> SNat n -> a -> BitVector (m + 1 - n)
      setSlice   :: BitPack a => SNat m -> SNat n -> BitVector (m + 1 - n) -> a -> a
      replaceBit :: Integral i => i -> Bit -> a -> a
      replace    :: Integral i => i -> a -> Vec n a -> Vec n a

      This allows for easier chaining, e.g.:

      replaceBit 0 1 $
      repleceBit 4 0 $
      replaceBit 6 1 bv
    • Until version 0.7.5, given x :: Vec 8 Bit and y :: BitVector 8, it used to be last x == msb y. This is quite confusing when printing converted values. Until version 0.7.5 we would get:

      > 0x0F :: BitVector 8
      > unpack 0x0F :: Vec 8 Bit

      As of version 0.8, we have head x == msb y:

      > 0x0F :: BitVector 8
      > unpack 0x0F :: Vec 8 Bit

      So converting for Vectors of Bits to BitVectors is no longer index-preserving, but it is order-preserving.

    • Add QuickCheck Arbitary and CoArbitary instances for all data types

    • Add lens Ixed instances for BitVector, Signed, Unsigned, and Vec

0.7.5 May 7th 2015

  • New features:
    • Moore machine combinators

0.7.4 *May 5th 2015

  • New features:
    • Add TopEntity annotations

0.7.3 April 22nd 2015

0.7.2 April 20th 2015

0.7.1 March 25th 2015

  • Fixes bugs:
    • Fix laziness bug in Vector.(!!) and Vector.replace

0.7 March 13th 2015

  • New features:

    • Switch types of bundle and bundle', and unbundle and unbundle'.
    • Rename all explicitly clocked versions of Signal functions, to the primed name of the implicitly clocked Signal functions. E.g. cregister is now called register' (where the implicitly clocked function is callled register)
    • Add new instances for DSignal
    • Add experimental antiDelay function for DSignal
    • Generalize lifted functions over Signals (e.g. (.==.))
  • Fixes bugs:

    • Faster versions of Vector.(!!) and Vector.replace November 17th 2014

  • Fixes bugs:
    • Add missing ‘CLaSH.Sized.BitVector’ module to .cabal file.

0.6 November 17th 2014

  • New features:

    • Add Fractional instance for Fixed #9
    • Make indexing/subscript of Vec ascending #4
    • Add separate BitVector type, which has a descending index.
    • Add bit indexing operators, including the index/subscript operator (!).
    • Add bit reduction operators: reduceOr, reduceAnd, reduceOr.
    • Rename BitVector class to BitPack with pack and unpack class methods.
    • Rename Pack class to Bundle with bundle and unbundle class methods.
    • Strip all Vec functions from their v prefix, i.e. vmap -> map.
    • Rename Vec indexing operator from (!) to (!!).
    • Combine Add and Mult class into ExtendingNum class.
    • Add extend and truncate methods to the Resize class.
    • Add SaturatingNum class with saturating numeric operators.
    • Add multitude of lifted Signal operators, i.e. (.==.) :: Eq a => Signal a -> Signal a -> Signal Bool
    • Add CLaSH.Signal.Delayed with functions and data types for delay-annotated signals to support safe synchronisation.
    • Add CLASH.Prelude.DataFlow with functions and data types to create self-synchronising circuits based on data-flow principles.
  • Fixes bugs:

    • Remove deprecated ‘Arrow’ instance for and related functions for Comp #5

0.5.1 June 5th 2014

  • New features:

    • Add Default instance for Vec #2
    • Instantiation for blockRam #3
  • Fixes bugs:

    • Fixed error on documentation of fLit in Fixed.hs #6
    • Non-translatable Enum function interfere with sassert compilation #7
    • Substituted the word ‘list’ into ‘vector’ in some places in the documentation. #8
    • mark vselectI INLINEABLE #10

0.5 April 3rd 2014

  • Add explicitly clocked synchronous signals for multi-clock circuits

0.4.1 March 27th 2014

  • Add saturation to fixed-point operators
  • Finalize most documentation

0.4 March 20th 2014

  • Add fixed-point integers
  • Extend documentation
  • ‘bit’ and ‘testBit’ functions give run-time errors on out-of-bound positions

0.3 March 14th 2014

  • Add Documentation
  • Easy SNat literals for 0..1024, e.g. d4 = snat :: SNat 4
  • Fix blockRamPow2

0.2 March 5th 2014

  • Initial release